Tag: ee times

NRAM’s Day Is Finally Here: Report [Portfolio]

/ Gary Hilson

Better late than never might be a good way to sum up NRAM.

After years of not quite be ready for wide adoption, a new report from BCC Research is predicting that Nano-Ram (NRAM) is finally in a position to disrupt incumbent DRAM and flash memory with commercialization expected in 2018. The Wellesley, MA.-based research firm said the first non-volatile memory chip to exploit carbon-nanotube technology looks like it’s finally ready to have a serious impact on computer memory.

“Industry experts had given up on waiting for CNT memory,” said BCC Research editorial director Kevin Fitzgerald in an interview with EE Times. “I believe one needed fresh eyes to really see that the time was coming when it was really possible to make the switch from silicon to carbon.”

Read my full article on EE Times.

Micron’s Successful Quarter Reflects 3D NAND Progress [Portfolio]

/ Gary Hilson

TORONTO — Financial analysts attending yesterday’s quarterly update from Micron Technology were congratulating the company on its strong numbers, but the real story might be that it’s mastered 3D NAND.

“What’s encouraging is where they are with their 3D NAND,” said Jim Handy, principal analyst with Objective Analysis. In a telephone interview with EE Times after Micron’s Q1 2017 conference call, he noted that other vendors, particularly Samsung, have struggled with 3D NAND, whereas Micron appears to making good progress. “Micron’s transition time is going to be longer than other technologies because they have to buy new equipment.”

That includes whole new factory in Singapore, noted Handy. “There’s something that eluded everyone else that Micron seems to have got right.” He speculates that its decision to use a floating gate process might have been a factor, as other vendors went the charge trap route. “I wouldn’t be at all surprised that Micron has shown everyone the need to go with floating gate instead of charge trap.”

Read my full article on EE Times.

New Consortium Drives Micron’s Xccela Bus [Portfolio]

/ Gary Hilson

TORONTO – Micron Technology’s recently launched Xccela Consortium is ostensibly aimed at promoting its high-speed, low signal count octal interface bus and ecosystem, but at least one early member of the group sees as also being necessary for unifying a fragmented market for NOR flash technology that supports the growing market for instant-on applications.

“Serial NOR flash has pretty much diversified over the past decade,” said Mike Chen, GigaDevice Semiconductor’s senior director of technical marketing, in an interview with EE Times. “Everyone has their ideas to and is designing their own product based on their customer needs. Everyone has their own ideas.”

This has led to complicated product lines, Chen said. Based on customer feedback from the field, he said having a standard would make his life much easier. “We see a need in this product line to have some sort of unification,” he said.

Read my full article on EE Times.

Micron’s 3D NAND Hits Enterprise SSDs [Portfolio]

/ Gary Hilson

TORONTO — Micron Technology is declaring spinning disk dead with the introduction of its first solid state drives (SSDs) using its 3D NAND for the enterprise market.

All-flash storage array vendors such as Violin Memory and others have been pushing the message that hard drives are dead for a number of years now, Micron sees spinning media winding down because its new 5100 line of enterprise SATA SSDs are able to offer a lower total cost of ownership (TCO), said Scott Shadley, the company’s principal technologist for its storage business.

In a telephone interview with EE Times, he said the launch of the 5100 series comes on the heels of the company’s success in the client segment with 1100 series of SSDs using Micron’ 3D technology. Shadley acknowledges it isn’t the first to then enterprise market with 3D NAND SSDs, but said Micron is looking to be strategic with its offerings.

Read my full article on EE Times.

EE Times: PCIe Storage Spec Group Incorporates for Added Clout [Portfolio]

/ Gary Hilson

EE TimesThe NVM Express Work Group has decided to incorporate itself to further the NVM Express (NVMe) specification for accessing solid-state disks (SSDs) on a PCI Express (PCIe) bus. NVMe is a standardized register interface, command, and feature set for PCIe-based storage technologies such as SSDs, designed specifically for non-volatile memory. It is optimized for high performance and low latency, scaling from client to enterprise segments. Read Full Article.

EE Times: Samsung Pushes DDR3 Design & Manufacturing to New Efficiencies [Portfolio]

/ Gary Hilson

EE TimesAs DDR4 awaits widespread adoption and new technologies such as hybrid memory cube continue to be fleshed out, there remains opportunity to improve on DDR3’s performance, and more importantly, its design and manufacturing. Last week, Samsung announced it was mass producing what the company said is the most advanced 4Gb DDR3 memory based on a new 20 nanometer process technology using immersion ArF lithography. Read Full Article.

EE Times: Research Labs Push the Bleeding Edge of Shared Memory Systems [Portfolio]

/ Gary Hilson

EE TimesWhile businesses turn to proven systems for their high-performance computing needs, research institutions are more willing to experiment and take a chance on the latest and greatest to solve complex problems. The Japan Agency for Marine-Earth Science and Technology (JAMSTEC) is the perfect example: It recently selected SGI’s large-scale shared memory system, the UV 2000, for installation at its Earth Simulator supercomputer center. Read Full Article.

EE Times: DDR4 Heir-Apparent Makes Progress [Portfolio]

/ Gary Hilson

EE TimesThe Hybrid Memory Cube Consortium (HMCC) is making steady progress on bringing one of the most discussed heirs to DDR4 closer to reality by releasing an update to the HMC specification late last month. The first draft of the second-generation specification supports increased data rates that advance short-reach (SR) performance from 10 Gbit/s, 12.5 Gbit/s, and 15 Gbit/s, up to 30 Gbit/s. Read Full Article.

RONNIEE Card Shares Memory Across Networks [Portfolio]

/ Gary Hilson

EE TimesStartup A3Cube recently announced a new network interface card, dubbed RONNIEE Express, designed to eliminate the I/O performance gap between CPU power and data access performance for datacenters, big data, and high-performance computing applications. The company said that by turning PCI Express into an intelligent network fabric, it can exceed existing networking technologies such as Ethernet, InfiniBand, and Fibre Channel, and improve memory latencies. Read my full story on EE Times.

EE Times Roundup: Next Generation Memory [Portfolio]

/ Gary Hilson

EE TimesThere are a number of next generation memory technologies on the horizon that hold great promise to meet the evolving needs of consumer devices and enterprise storage systems and applications. Some have been in development for a number of years, and are close to a critical turning point that will see them widely adopted. Here’s a few that merit watching in the next year, including several DRAM alternatives. Read my full article on EE Times.