Gone are the days of having to manually defrag your hard drive because it’s done automatically, and flash doesn’t experience file fragmentation. Or does it?
It may be that your smartphone is running slow because it can’t keep up with software updates and bloating, but that its flash storage is experiencing file fragmentation. Joel Catala, director of Embedded Solutions at Tuxera, said that contrary to popular belief, fragmentation can significantly affect performance of a flash device. Recent research suggests that as flash storage hardware gets faster, the software I/O stack overhead is an I/O performance bottleneck, he said in a telephone interview with EE Times. It’s not the flash or the controller responsible for the bottleneck.
Read the full EE Time story.
oom or bust. It’s long been the cycle for established memory technologies. As 3D NAND pricing softens, DRAM still appears to be going strong. But for how long? And will these ups and downs always be the norm despite diversified demand and emerging vendors from China?
One key characteristic of the DRAM market is that there are currently only three major suppliers — Micron Technology, SK Hynix and Samsung Electronics.
“They’re keeping a pretty tight rein on their capacity,” said Brian Matas, vice president of market research at IC Insights, said in a telephone interview with EE Times. “And at the same time, there’s also pretty strong demand for higher performance and higher-density parts, particularly from the data center and server applications.”
Read my EE Times story.
With the automotive market presenting potential opportunities of ever-emerging memories such as ferroelectric RAM (FRAM), magnetoresistive RAM (MRAM), and resistive RAM (ReRAM), Adesto Technologies is working hard to make sure that the latter makes the grade.
It recently unveiled new research demonstrating the potential of ReRAM for high-reliability applications such as automotive. The research was led by Adesto Fellow Dr. John Jameson, who shared the results at the ESSCIRC-ESSDERC 48th European Solid-State Device Research Conference earlier this month, and indicates that ReRAM could become a widely used, low-cost, and simple embedded non-volatile memory (eNVM) because it uses simple cell structures and materials that can be integrated into existing manufacturing flows with as little as one additional mask.
Read my latest for EE Times.
TORONTO — The “G” still stands for “graphics,” but new use cases driving the need for GDDR memory technology have nothing to do with pixels.
In fact, applications such as artificial intelligence (AI) and machine learning, which need ultra-fast memories, have shorted gamers of their GDDR supply, so it’s probably a good idea that makers of the technology are ramping up delivery. Micron Technology recently began volume production of its 8-Gb GDDR6 memory, which, of course, is aimed at the graphics market but also automotive and networking segments.
Some of the emerging uses cases for GDDR memory are still graphics-driven. In the growing automotive memory market, it’s to support increasingly visual dashboards and advanced driver assistance systems (ADAS) that must be responsive to a driver’s actions immediately, while autonomous vehicles need high-performance memory to process the vast amounts of real-time data. Other emerging applications include augmented reality (AR) and virtual reality (VR). Finally, video is always hungry for memory as 4K gets more widely adopted and 8K nips at its heels.
Read my full story on EE Times.
TORONTO — What the future holds for 3D XPoint — now that Intel and Micron have announced plans to end their joint development program — depends on who you talk to.
Or who you don’t talk to. Micron, for its part, isn’t offering any more guidance right now beyond what was stated in a joint news release issued earlier this week. “The companies have agreed to complete joint development for the second generation of 3D XPoint technology, which is expected to occur in the first half of 2019,” the statement reads. “Technology development beyond the second generation of 3D XPoint technology will be pursued independently by the two companies in order to optimize the technology for their respective product and business needs.”
Intel is still bullish on the technology. In a telephone interview with EE Times, Bill Leszinske, vice president of Intel’s non-volatile memory solutions group, said it makes sense for Intel to continue on its present path.
Read my full EE Times story
TORONTO — As cars get smarter and demand more memory, many technologies are angling for the driver’s seat, but it’s safe to say NOR flash at least gets to ride shotgun.
As a successor to EEPROM in many applications thanks to its programmability capabilities, NOR flash is finding new opportunities in application areas that need fast, non-volatile memory, including communications, industrial and automotive. The latter, of course, is getting a lot of attention thanks to autonomous vehicle development.
Macronix International, which describes itself as the leading supplier of NOR flash overall, find itself in the third position for automotive. But Anthony Le, senior director of marketing, ecosystem partnership and North America automotive, said the company is confident it will lead that segment in the next two to three years.
Read the full story on EE Times.
TORONTO — On the heels of shaking up its partnership with Intel, Micron Technology Chief Technology Officer Ernie Maddock took the stage at the J.P. Morgan 16th Annual Tech Forum at the 2018 International CES to field questions about the road ahead.
In a Q&A and session moderated by Harlan Sur, analyst for U.S. Semiconductor and Semiconductor Capital Equipment Research at J.P. Morgan, Maddock emphasized that the update to Micron’s working relationship with Intel is only related to NAND development.
At the top of the week, the companies announced they have mutually agreed to work independently on future generations of 3D NAND. Micron and Intel will complete development of their third-gen 3D NAND technology toward the end of the year and into 2019. Maddock said based on evolving roadmaps and the needs of each company’s respective markets, it made sense to diverge for the next node.
Read the full article over at EE Times.
TORONTO — Following on the heels of a major specification update and its eighth annual plug fest, NVM Express is poised to have a busy year as it continues to develop the base NVMe specification while expanding the NVMe Management Interface (NVMe-MI) specification and one for accessing SSDs on a PCIe bus over fabrics.
In June, the NVMe specification got its first major update in nearly three years, putting it on the cusp of becoming the defacto standard for SSD interfaces. Version 1.3 added a significant number of new features, something that hasn’t been done since November 2014, encompassing 24 technical proposals spread across three major buckets that address client, enterprise and cloud features. Most significant was improved support for virtualization so developers can more flexibly assign SSD resources to specific virtual machines, thereby addressing latency.
Meanwhile, the eighth NVMe Plugfest at the University of New Hampshire Interoperability Laboratory last fall offered the first official NVMe Over Fabrics (NVMe-oF) compliance and interoperability transport layer testing for RoCE, Remote Direct Memory Access (RDMA) over Converged Ethernet, and the Fibre Channel. UNH-IOL fills the role of independent testing provider of standards conformance solutions and multi-vendor interoperability, and the latest plugfest generated 14 new certified products for the base NVMe integrators list and one for the NVMe-MI integrators list. Eight inaugural products were also approved for the newly launched NVMe-oF integrators list, which accepts RoCE initiators and targets, Ethernet switches, as well as Fibre Channel initiator, targets and switches and software.
Read the full story over at EE Times.
TORONTO — A novel algorithm developed by IBM scientists is improving the understanding of complex chemical reactions and optimizing quantum computing.
The scientists have developed a new approach to simulate molecules on a quantum computer using a seven-qubit quantum processor to address the molecular structure problem for beryllium hydride (BeH2), which is the largest molecule simulated on a quantum computer to date, according to IBM. The results are significant as they could lead to practical applications such as the creation of novel materials, development of personalized drugs and discovery of more efficient and sustainable energy sources.
In a telephone interview with EE Times, IBM quantum computer research team member Abhinav Kandala outlined how they implemented an algorithm that is efficient with respect to the number of quantum operations required for the simulation. Using six qubits of a seven-qubit processor, they were able to measure BeH2’s lowest energy state, a key measurement for understanding chemical reactions. The results were just published in the peer-reviewed journal Nature, which Kandala co-authored.
Read the full story on EE Times.
TORONTO — Last year could be described as a tipping point for the magneto-resistive random access memory (MRAM) market. Up until then, Everspin Technologies was the only company shipping commercial MRAM products. But as Spin Transfer Technologies (STT) CEO Barry Hoberman is always quick to acknowledge, Everspin’s success has helped to pave the way for other MRAM players.
The genesis of STT goes back as far as 2001 with technology originally developed from research conducted by New York University Professor Andrew Kent. STT was formed and incubated by Boston-based Allied Minds in 2007. In September 2016, the developer of orthogonal spin transfer MRAM technology (OST-MRAM) announced it had fabricated perpendicular MRAM magnetic tunnel junctions (MTJs) as small as 20nm at its development fab based at the company’s headquarters in Fremont, Calif.
Since then, STT has delivered samples of its spin transfer torque MRAM to customers in North America and Asia, a milestone that’s significant in that it’s one of several emerging memories considered to be a next-generation candidate to replace DRAM and NAND flash, which face scaling challenges as the industry moves to smaller nodes. STT is one of a handful of firms developing MRAM, so the delivery of samples is an important proof point validating both MRAM in general, and STT’s technology in particular.
EE Times recently spoke with Hoberman about the company’s ramp up, and the opportunities for MRAM as more players go to market, including where it might be a viable replacement for incumbent technologies.
Read the full Q&A on EE Times.